1. Field of the Invention
The present invention relates to a wide-band voltage controlled oscillator for wide-band wireless communication, and more particularly, to a wide-band voltage controlled oscillator that can vary oscillation frequency linearly over a wide bandwidth while having wide-band frequency tuning characteristics, by allowing amount of frequency variation for all digital control bits as well as VCO gain (KVCO) with respect to control voltage of the voltage controlled oscillator according to a control signal to be kept constant using a pseudo-exponentially weighted capacitor bank.
2. Description of the Related Art
Recently, a voltage controlled oscillator having wide-band characteristics is highly required for a radio frequency (RF) transceiver supporting multiband multimode wireless communication. A general RF voltage controlled oscillator utilizing a fixed LC tank has narrow bandwidth characteristics. In this case, wide bandwidth characteristics can be obtained by utilizing the capacitance variation characteristic of the varactor diode in the LC tank. However, it may lead to a practical problem because the oscillation frequency variation by utilizing only a single varactor diode may also increase the voltage controlled oscillator gain (KVCO) too much, and as a result may deteriorate the phase noise characteristics of the voltage controlled oscillator.
Therefore, a method for varying capacitance of the capacitor bank constituting the LC tank in the voltage controlled oscillator to cover a desired bandwidth while maintaining the capacitance variation of the varactor diode low is generally used.
Here, the capacitor bank is composed of several unit capacitors that are designed to have binary-weighted values of capacitances.
When a digital code is input thereto, the capacitance is varied in a linear way with respect to the input digital code and thus the oscillation frequency is varied nonlinearily, particularly in an exponential way for the binary weigthed capacitor bank.
The capacitor bank having the configuration described above causes the amount of frequency variation per a digital code to change and the VCO gain (KVCO) to vary much as the digital input code changes. When the type of VCO is used for a phase locked loop (PLL), it will eventually cause severe differences in loop characteristic of the PLL, and thus may degrade the performances of the PLL system.
In addition, it causes the amount of frequency variation against a digital input code to vary greatly as the oscillation frequency varies. Accordingly, while the oscillation frequency of the voltage controlled oscillator are changed through the digital input code, the number of tuning curves that produces the same frequency may vary, which leads to difficulty in the design of the PLL system.
FIG. 1 is a circuit diagram of a conventional voltage controlled oscillator.
Referring to FIG. 1, the typical wide-band voltage controlled oscillator, which is a wide-band voltage controlled oscillator fabricated in a CMOS process, includes a negative-transconductance generation unit 10, an inductor unit 20, a variable capacitor unit 30, and a capacitor bank 40. The negative-transconductance generation unit 10 provides gain for compensating loss caused by parasitic components in an LC tank. The inductor unit 20 includes an inductor LT for providing inductance for resonance. The variable capacitor unit 30 is composed of varactor diodes whose capacitance varies with a tuning voltage VT. The capacitor bank 40 includes a plurality of capacitors which are connected in parallel and selected by a control signal. The total capacitance of the variable capacitor unit 30 and the capacitor bank 40 and the total inductance of the inductor unit 20 determine the resonance frequency of the tank.
The negative-transconductance generation unit 10 includes cross-coupled PMOS transistor pair 11 and cross-coupled NMOS transistor pair 12 to provide sufficient gain for stable oscillation. The cross-coupled PMOS transistor pair 11 is connected to a power supply voltage VDD and the cross-coupled NMOS transistor pair 12 is connected to a ground.
For example, the cross-coupled PMOS transistor pair 11 includes PMOS transistors MP1 and MP2. The gate of the PMOS transistor MP1 is connected to the drain of the PMOS transistor MP2 and the gate of the PMOS transistor MP2 is connected to the drain of the PMOS transistor MP1, respectively.
Such a wide-band voltage controlled oscillator includes a method of tuning the capacitance in a preferred way for determining the resonance frequency so as to obtain a wide-band characteristic.
For example, the capacitor bank 40 may be configured such that the composing unit capacitors have binary weighted values (2nC). This allows the total capacitance Ctot of the capacitor bank 40 selected by a binary digital control signal to be varied linearly. In this case, the oscillation frequency of the output signal is determined by the following expression:
                              f          c                =                  1                      2            ⁢            π            ⁢                                          LT                ·                                  C                  tot                                                                                        (        1        )            where LT is an inductance of the inductor unit 20, Ctot is a total capacitance of the variable capacitor unit 30 and the capacitor bank 40.
In Equation 1, if the capacitance of the variable capacitor unit 30 is much smaller than the total capacitance, the oscillation frequency fc will vary according to the digital control signal. In this case, the relations between the oscillation frequency, the tuning voltage, and the digital control signal are as shown in FIG. 2A.
As shown in FIG. 2A, as the oscillation frequency increases, the VCO gain (KVCO) increases significantly.
FIG. 2B is a graph illustrating the relation between the oscillation frequency and the digital control signal when the tuning voltage Vtune is fixed at a certain value.
As shown in FIG. 2B, as the oscillation frequency increases, the variation of the frequency against the digital control signal increases dramatically.
The reason is as follows. When the capacitor bank 40 is set to have a maximum capacitance, the oscillation frequency of the output signal is equal to:
                              f          c                =                  1                      2            ⁢            π            ⁢                                          LT                ·                                  (                                                            C                      var                                        +                                          C                      max                                                        )                                                                                        (        2        )            where Cvar is a capacitance of the variable capacitor unit 30, and Cmax is the maximum capacitance of the capacitor bank 40.
Meanwhile, when the capacitor bank 40 is set to have a minimum capacitance, the oscillation frequency is equal to:
                              f          c                =                  1                      2            ⁢            π            ⁢                                          LT                ·                                  (                                                            C                      var                                        +                                          C                      min                                                        )                                                                                        (        3        )            
At a lowest oscillation frequency with Cmax, the variation of the capacitance Cvar of the variable capacitor unit 30 is relatively small compared to the maximum capacitance Cmax of the capacitor bank 40. However, as the oscillation frequency becomes high, the variation of the capacitance Cvar of the variable capacitor unit 30 become relatively large compared to the minimum capacitance Cmin of the capacitor bank 40. Consequently, there is a big change of the VCO gain (KVCO) with respect to the digital control signal as the oscillation frequency changes, as shown in FIG. 2A.
If the VCO gain (KVCO) with respect to control voltage and the amount of frequency variation with respect to digital control signal vary significantly over the operating frequency range, lock time and phase noise may be deteriorated over the operating frequency of a system (e.g., a phase locked loop (PLL) system) to which the voltage controlled oscillator is applied.
Such a variation in the KVCO can be improved by controlling the capacitance of the varactor diode in proportion to the variation of the capacitance of the capacitor bank. However, simple adjustment of only the capacitance of the varactor diode according to the operating frequency could fail to compensate for the amount of frequency variation with respect to the digital code.
Furthermore, in a high frequency range, the number of overlapped tuning curves that correspond to a same frequency is decreased. As a result, the locking process of PLL would become unreliable. Furthermore, it may also increase the possibility of causing errors in the PLL operation in automatically determining an optimum digital code when a target frequency is given.